Evaluation of capacitance-voltage characteristics for high voltage SiC-JFET

IEICE Electronics Express

Tsuyoshi Funaki²  Takashi Hikihara²  Tsunenobu Kimoto¹ 

[1] Kyoto University, Dept. of Electronic Science and Eng., Graduate school of Engineering;Kyoto University, Dept. of Electrical Eng.

关键词: C-V characteristics;    high voltage;    SiC;    JFET;    device structure;   

DOI  :  10.1587/elex.4.517

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(8)Cited-By(7)Capacitance between terminals of a power semiconductor device substantially affects on its switching operation. This paper presents a capacitance-voltage (C-V) characterization system for measuring high voltage SiC-JFET and the results. The C-V characterization system enables one to impose high drain-source voltage to the device and extracts the capacitance between two of three terminals in FET by eliminating its influence on the neighboring terminal. The capacitance between the gate and drain, and the drain and source represents the hybrid structure of the lateral channel and vertical drift layer of the SiC-JFET.

【 授权许可】

Unknown