Yearlong 500 C Operational Demonstration of Up-Scaled 4H-SiC JFET Integrated Circuits

Neudeck, Philip G ; Spry, David J ; Krasowski, Michael J ; Prokop, Norman F ; Beheim, Glenn M ; Chen, Liangyu ; Chang, Carl W

关键词: INTEGRATED CIRCUITS;    JFET;    SEMICONDUCTORS (MATERIALS);   

RP-ID  :  GRC-E-DAA-TN54916

学科分类：电子与电气工程

美国|英语

来源: NASA Technical Reports Server

【 摘 要 】

This work describes recent progress in the design, processing, and testing of significantly up-scaled 500 C durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for over one year at 500 C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500 C-durable circuit complexity from the 24 transistor ring oscillator ICs reported at HiTEC 2016. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for combustion engine sensing and control, planetary exploration, deep-well drilling monitoring, and other harsh-environment applications.