Ab Initio Electronic Structure Calculations For High-K Dielectrics

ab initio calculation;high-k dielectrics

Zhang, Yu ; Harald Ade, Committee Member,Jerry L. Whitten, Committee Member,Dave Aspnes, Committee Member,Gerald Lucovsky, Committee Chair,Zhang, Yu ; Harald Ade ; Committee Member ; Jerry L. Whitten ; Committee Member ; Dave Aspnes ; Committee Member ; Gerald Lucovsky ; Committee Chair

University:North Carolina State University

关键词: ab initio calculation;    high-k dielectrics;   

Others  :  https://repository.lib.ncsu.edu/bitstream/handle/1840.16/5653/etd.pdf?sequence=1&isAllowed=y

美国|英语

来源: null

【 摘 要 】

In current semiconductor industry, continuing improvement in the performance of MOSFET requires aggressive scaling down of the dimensions ofCMOS devices. A better capacitance/unit area can be gained as gate oxide thickness decreases. An equivalent oxide thickness (EOT) less than 1.0nm is required according to the 2002 International Technology Roadmap for Semiconductor (ITRS). However, as gate oxide thickness scaling down, tunneling current will increase, which will lower the device performance. SiO2, as the widely used gate oxide material, has reached its scaling limit due to the high current leakage at this thickness. Non-crystalline alloys of i) group IIIB, IVB and VB TM oxides and ii) first row RE oxides with SiO2 and Al2O3 have been proposed as alternative high-k gate dielectrics for advanced Si devices.This dissertation addresses differences between the electronic structure ofalternative high-k transition metal dielectrics and SiO2. Ab inito calculations, based on small clusters identify unique aspects of electronic structure that are associated with the TM atoms. The lowest conduction band states are derived from atomic d-states of the TM atoms, and are localized on these atoms. Excitations into these states i) from TM core states, ii) from oxygen K1, iii) from oxygen atom derived valence band states, are simulated by using ab inito calculations at self-consistant-field (SCF) Hartree-Fock and Configuration Interaction (CI) level. And these electronic structure calculations are used to interpret optical, ultra-violet (UV), X-ray and electron spectroscopies, including UV and X-ray photoemission (UPS and XPS, respectively), and Auger electron spectroscopy (AES), and also provide a basis for interpretation of electrical results and narrowing the field of possible replacement dielectrics for advanced semiconductor devices.