An integer-N charge-pump phase-locked loop with controllable phase offset

PLL;CPLL;charge-pump;phase offset, ,

Yim, Chris ; Hanumolu ; Pavan K.

关键词: PLL;    CPLL;    charge-pump;    phase offset, ,;   

Others  :  https://www.ideals.illinois.edu/bitstream/handle/2142/106254/YIM-THESIS-2019.pdf?sequence=1&isAllowed=y

美国|英语

来源: The Illinois Digital Environment for Access to Learning and Scholarship

【 摘 要 】

In a phase-locked loop (PLL), the phase-offset is a result from non-idealities that usually need to be minimized to reduce the reference spurs at the output. However, in certain applications such as multi-buses, we would like to control this offset so we can align the clock with the data. This thesis will explore the idea of controlling the phase-offset at the output of a charge-pump PLL (CPLL) by setting the current mismatch in the charge-pump module.