科技报告详细信息
Technical Primer on Design and SPICE Modeling of Circuits for NASA Glenn SiC JFET IC Version 12 Prototype Wafer Run Part 1: SiC JFET Behavior and SPICE Modeling | |
Neudeck, Philip G | |
关键词: CIRCUITS; FABRICATION; PROTOTYPES; JFET; SILICON CARBIDES; WAFERS; INTEGRATED CIRCUITS; | |
RP-ID : GRC-E-DAA-TN68630 | |
学科分类:电子与电气工程 | |
美国|英语 | |
来源: NASA Technical Reports Server | |
【 摘 要 】
This presentation illustratively communicates how to SPICE model silicon carbide (SiC) SiC junction field effect transistors (JFETs) for designing circuits for NASA GRC's upcoming prototype fabrication of SiC JFET IC Version 12.【 预 览 】
Files | Size | Format | View |
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20190026451.pdf | 3852KB | download |