Pramana | |
Variation of interface trap level charge density within the bandgap of 4H-SiC with varying oxide thickness | |
A Azam21  Sanjeev K Gupta1 22  J Akhtar12  | |
[1] Center of Excellence in Material Sciences (Nanomaterials), Department of Applied Physics, Z.H. College of Engg. & Tech., Aligarh Muslim University, Aligarh 202 002, India$$;Sensors and Nano-Technology Group, Semiconductor Devices Area, Central Electronics Engineering Research Institute (CEERI)/Council of Scientific and Industrial Research (CSIR), Pilani 333 031, India$$ | |
关键词: 4H-SiC; wet thermal oxidation; MOSiC structure; interface trap level density.; | |
DOI : | |
学科分类:物理(综合) | |
来源: Indian Academy of Sciences | |
【 摘 要 】
Interfacial characteristics of metal oxide-silicon carbide (MOSiC) structure with different thickness of SiO2, thermally grown in steam ambient on Si-face of 4H-SiC (0 0 0 1) substrate were investigated. Variations in interface trapped level density (Dit) was systematically studied employing high-low (H-L) frequency ð¶â€“𑉠method. It was found that the distribution of Dit within the bandgap of 4H-SiC varied with oxide thickness. The calculated Dit value near the midgap of 4H-SiC remained almost stable for all oxide thicknesses in the range of 109 –1010 cm-2 eV-1. The Dit near the conduction band edge had been found to be of the order of 1011 cm-2 eV-1 for thicker oxides and for thinner oxides Dit was found to be the range of 1010 cm-2 eV-1. The process had direct relevance in the fabrication of MOS-based device structures.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
---|---|---|---|
RO201912040498219ZK.pdf | 210KB | download |