IEICE Electronics Express | |
Two-stage digital I/Q demodulator employing a reconfigurable 16-phase down-mixing technique | |
Chanyong Jeong1  Young-Jae Min2  Soo-Won Kim2  | |
[1] Corporate R&D Institute, Samsung Electro-Mechanics Co., Ltd.;Department of Electrical and Electronics Engineering, Korea University | |
关键词: demodulation; down-mixing; quadrature; sigma-delta; | |
DOI : 10.1587/elex.7.177 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(9)Cited-By(1)This letter presents a new two-stage digital I/Q demodulator employing a reconfigurable 16-phase quadrature intermediate frequency (IF) sampling technique for multistandard wireless systems such as mobile TV applications. The proposed two-stage digital I/Q demodulator provides the flexibility for the multiphase scheme such as a quadrature phase shift keying (QPSK) and 16-quadrature amplitude modulation (QAM) at the level of down-mixing, which introduces an efficient architecture for the following decimation filter. In this letter, the prototype chip has been implemented in a 0.18µm standard CMOS technology and occupied with the active chip area of 0.02mm2. The power consumption of the fabricated chip is 0.42mW with a 1.8V supply voltage at the sampling frequency of 26 MHz. The experimental results show that the proposed two-stage digital I/Q demodulator is suitable for multistandard wireless systems which require small silicon area and low power dissipation.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300498320ZK.pdf | 1054KB | download |