Interface circuit of sigma-delta accelerometer with on-chip-test function

IEICE Electronics Express

Honglin Xu¹  Chong He¹  Mingyuan Ren¹  Xiaowei Liu¹ 

[1] MEMS Center, Harbin Institute of Technology

关键词: interface circuit;    on-chip-test;    sigma-delta;    linearization;   

DOI  :  10.1587/elex.11.20140320

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(5)Cited-By(2)A fifth-order fully differential interface circuit (IC) with on-chip-test function is presented to improve the noise performance for micromechanical sigma-delta (Σ-Δ) accelerometer. The proposed on-chip-test technique for Σ-Δ accelerometers avoids a shaker table applying a sinusoidal signal as the simulated acceleration which involves distortion itself. An electrostatic force feedback linearization circuit is presented to reduce the harmonic distortion resulting in a larger dynamic range (DR). The post-simulation results show that the electrostatic force feedback linearization circuit decreases the harmonic distortion effectively and the proposed on-chip-test technique achieves 98 dB third-order harmonic distortion detection, and the nonlinearity of the proposed circuit is 0.02%.

【 授权许可】

Unknown