Divide-by-N and divide-by-N/N+1 prescalers based on a shift register and a multi-input NOR gate

IEICE Electronics Express

Seon-Woo Hwang¹  Yongsam Moon¹ 

[1] School of Electrical and Computer Eng., University of Seoul

关键词: divider;    prescaler;    dual-modulus divider;    linear feedback shift register;    PLL;   

DOI  :  10.1587/elex.9.1611

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(6)This paper describes the architecture of a divide-by-N prescaler and a divide-by-N/N+1 dual-modulus prescaler based on a shift register and a multi-input NOR gate. The divide-by-N prescaler has a circuit style similar to a linear feedback shift register (LFSR), except for the fact that a multi-input NOR gate is used instead of XOR gates. This architecture can be applied to various division ratios of N ≥ 2 by changing the numbers of flip-flops and NOR-gate inputs according to specific rules, which will be explained in this paper. The state of the prescaler runs through the correct loop without requiring a reset signal or an initialization circuit.

【 授权许可】

Unknown