An efficient parallel systolic array for AB2 over GF(2m)

IEICE Electronics Express

Won-Jin Lee¹  Kee-Won Kim² 

[1] Institute of Media Content, Dankook University;College of Engineering, Dankook University

关键词: cryptography;    finite fields;    multiplication;    systolic array;    exponentiation;   

DOI  :  10.1587/elex.10.20130585

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(9)This paper presents an efficient parallel-in parallel-out systolic array for AB2 over GF(2m) using the polynomial basis. As compared to existing related systolic arrays, the proposed array gains a significant reduction in hardware complexity. The proposed architecture includes the features of regularity, modularity and local interconnection. Accordingly, it is well suited for VLSI implementation and can be easily applied as a basic architecture for computing an inversion/division operation.

【 授权许可】

Unknown