A semi-systolic Montgomery multiplier over GF(2m)

IEICE Electronics Express

Kee-Won Kim¹  Jun-Cheol Jeon² 

[1] College of Convergence Technology, Dankook University;Department of Computer Engineering, Kumoh National Institute of Technology

关键词: finite field;    Montgomery multiplication;    systolic array;    cryptography;   

DOI  :  10.1587/elex.12.20150769

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(12)In this study, we present an efficient finite field arithmetic architecture based on systolic array for multiplication which is a core algorithm for division and exponentiation operations. In order to obtain dedicated area-efficient circuits, we adopt Montgomery multiplication algorithm and systolic array. First of all we induce an efficient arithmetic algorithm from typical Montgomery multiplication using an effective factor, then we design an efficient semi-systolic array based multiplication architecture which is highly suitable for pipelined operations. The proposed multiplier saves at least 40% area complexity as compared to the corresponding existing structures.

【 授权许可】

Unknown