BSIM3 parameters extraction of a 0.35 μm CMOS technology from 300K down to 77K

12th International Workshop on Low Temperature Electronics

Varizat, Laurent^1,2 ; Sou, Gerard^1 ; Mansour, Malik^2

Electrical and Electromagnetism Laboratory, Pierre and Marie Curie University, 4 Place Jussieu, Paris Cedex 05

75252, France^1

Laboratory of Plasma Physics, CNRS, Ecole Polytechnique, Route de Saclay, Palaiseau

61128, France^2

关键词: CMOS technology;    Gate-enclosed layout;    Model-based OPC;    MOS-FET;    Parameters extraction;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/834/1/012002/pdf
DOI  :  10.1088/1742-6596/834/1/012002

来源: IOP

【 摘 要 】

In this work, we present a commercial 0.35 μm/3.3 V CMOS technology behaviour study of both linear and gate-enclosed transistors from room temperature down to 77 Kelvin. Cryogenic setup used to complete this study is first described. Measurement results are then discused and a model based on a BSIM3 parameters extraction is proposed.