High speed SLVS transmitter and receiver

International Conference on Particle Physics and Astrophysics

Bulbakov, I.S.^1 ; Atkin, E.V.^1 ; Voronin, A.G.^1,2

National Research Nuclear University MEPhI (Moscow Engineering Physics Institute), Kashirskoe highway 31, Moscow

115409, Russia^1

SINP (Skobeltsyn Institute of Nuclear Physics), Moscow State University, 1(2), Leninskie gory, GSP-1, Moscow

119991, Russia^2

关键词: Chip-to-chip communications;    CMOS processs;    DAQ system;    Electrical cables;    Front end;    High Speed;    On-chip tests;    Transmitter and receiver;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/675/4/042035/pdf
DOI  :  10.1088/1742-6596/675/4/042035

来源: IOP

【 摘 要 】

Design of SLVS chip-to-chip communication transmitter/receiver IP block in 180 nm UMC MMRF CMOS process is presented. This block has been developed for study a data transmission over PCBs and/or electrical cables (lines) of few meters length at rates up to 320 Mb/s. Schematic for on-chip tests is also presented. This blocks are used for communication between front-end ASICs and DAQ system.