Young, Chadwin Delin ; Richard T. Kuehn, Ph.D., Committee Chair,Veena Misra, Ph.D., Committee Co-Chair,George A. Brown, Committee Member,John R. Hauser, Ph.D., Committee Member,Dennis M. Maher, Ph.D., Committee Member,Young, Chadwin Delin ; Richard T. Kuehn ; Ph.D. ; Committee Chair ; Veena Misra ; Ph.D. ; Committee Co-Chair ; George A. Brown ; Committee Member ; John R. Hauser ; Ph.D. ; Committee Member ; Dennis M. Maher ; Ph.D. ; Committee Member
Scaling of advanced CMOS device dimensions, as set forth for future technology nodes by the International Technology Roadmap for Semiconductors (ITRS), will require reduction of the equivalent oxide thickness (EOT) of gate dielectrics below a point that can be physically realized using silicon dioxide.In order to continue EOT scaling below ~1.5 nm and reduce gate leakage current, higher dielectric constant materials will be needed to replace SiO2. Hafnium-based dielectrics are being widely investigated as potential candidates for the gate dielectric application.Their charge trapping characteristics were identified as a primary issue preventing the introduction of Hf-based materials into CMOS technology, potentially causing threshold voltage instability and mobility degradation.Several measurement techniques can be used to study and quantify charge trapping: Capacitance-Voltage (C-V) hysteresis, alternating stress and sense Vfb/Vt instability, charge pumping, and fast transient Id-Vg measurement. While each of these techniques can provide information on specific aspects of the charge trapping phenomenon, some measurements are more convenient (e.g., less time consuming), and some may be more sensitive for resolving subtle differences between the experimental samples. In particular, C-V hysteresis measurements can be used to monitor Vfb shifts for evaluation of hysteresis. A more quantifiable technique that uses a constant voltage gate dielectric stress (CVS) with interspersed limited-voltage-range C-V measurements around flatband can be used.Although systematic, this technique results in the de-trapping of some of the charge between the stress and sense sequence. A more useful approach is the charge pumping (CP) technique.Fixed-amplitude charge pumping (FA CP) measures interface state densities, whereas variable-amplitude (VA CP) measures trap densities in the high-k bulk. However, interpretation of the data can be complicated due to the gate and source/drain leakage. Another powerful technique is the fast transient Id-Vg measurement in the microsecond regime. The shift of the Id-Vg curves generated by the up and down swing of a trapezoid pulse (i.e., Delta Vt) corresponds to the amount of the trapped charge.Our data indicates that the fast transient and charge pumping results on the charge trapping correlate rather well (though there are differences in values) while the 'stress and sense' approach seems to be less adequate. Charge pumping and fast transient measurements were conducted on HfSixOy (20% SiO2) and 'hybrid stack' (HfO2/ HfSixOy) gate dielectrics to investigate the effects of trapped charge on device performance (i.e., mobility). The HfSixOy films were deposited at 2 Torr and 4 Torr and were subjected to various post deposition anneal (PDA) ambients and temperatures.4 Torr silicates exhibit a higher mobility (peak and high field) than 2 Torr silicates that were subjected to the same post deposition processes. The impact of interfacial and bulk high-k properties on charge trapping issues was investigated using hybrid gate dielectric stacks of varying physical thickness with polysilicon electrodes. FA CP gives low interface state densities for all depositions indicating good interface passivation, whereas VA CP and fast transient shows large trap densities in the bulk of the high-k layer. Results demonstrate that the bulk trapping in the high-k film contributes to the degradation of device performance. Using fast transient measurements and analysis, trapped charge and free-carrier mobility can be extracted allowing characterization of the 'trap free' mobility, which is quite close to the universal electron mobility curve in the high field regime for process conditions of interest.
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Charge Trapping Characterization Methodology for the Evaluation of Hafnium-based Gate Dielectric Film Systems