Miniaturization of the commonly used on-chip lumped spiral inductor is highly desirable to reduce the fabrication cost and enhance the performance and functionality of radio frequency integrated circuits (RFICs). Numerous improvement methods have been demonstrated but all fail to fundamentally solve the intrinsic drawbacks of planar spiral structure, especially the most critical issue – substrate effects. A new design concept based on self-rolled-up nanomembrane nanotechnology that “processes like 2D and functions like 3D” is proposed and demonstrated. This thesis shows a global solution to obtain a lumped inductor with extremely small on-chip footprint and immunity to substrate effects. Experimental realization of self-rolled-up inductors shows a footprint two orders of magnitude smaller than that of the planar spiral inductors, with excellent quality factor (Q) and much higher operating frequency than the 2D counterparts in both capabilities.
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On-chip self-rolled-up nanomembrane tube inductor for RFIC performance enhancement