Fast Fir Algorithm Based Area- EfficientParallel Fir Digital Filter Structures

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering

article

P.THENMOZHI¹  C.THAMILARASI²  Mr. V.VENGATESHWARAN³ 

[1] Dept. of ECE, J.K.K.College of Technology;Dept. of ECE, Shree Vengateshwara hi-tech Engineering College;Dept. of ECE, Sri Shanmugha College of Engineering and Technology

关键词: Digital signal processing (DSP);    fast finite-impulse response (FIR) algorithms (FFAs);    symmetric convolution;   

来源: Research & Reviews

【 摘 要 】

In digital systems, the filters occupy a major role. This work describes the design of parallel FIR filter structures using poly-phase decomposition technique that requires minimum number of multipliers and low power adders. Normally multipliers consume more power and large area than the adders. For reducing the area, this filter structure uses adders instead of multipliers since the adder requires low power and less area than the multipliers. Moreover, number of adders does not increase along with the length of parallel FIR filter. Finally the proposed parallel FIR filter structures are beneficial in terms of hardware cost and power when compared to the existing parallel FIR filter structure.

【 授权许可】

Unknown