Low Power Design of the Processer Based onArchitecture Modifications

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering

article

M Jasmin¹ 

[1] Bharath University

关键词: Coarse-grained reconfigurable architecture (CGRA);    cache;    context architecture;    low power;   

来源: Research & Reviews

【 摘 要 】

In the recent era as the devices are shrinking down low power design methodologies are of greater importance.A CGRA that is focused on data path computations for a particular application domain is a balancing act akin to design an ASIC and a FPGA simultaneously. Narrowing the application domain significantly makes the design of the CGRA very much like that of a programmable ASIC. Widening the application domain requires a more flexible data path that requires more configurable over head and has less overall efficiency compared to an FPGA.So A reconfigurable architecture is used with modified architecture in ALU arrays, there by reducing power. The Architecture presented is replaceable to all processors including DSP processors .

【 授权许可】

Unknown