Revisiting Multiple Ring Oscillator-Based True Random Generators to Achieve Compact Implementations on FPGAs for Cryptographic Applications

Cryptography

article

Luis Parrilla¹  Antonio García¹  Encarnación Castillo¹  Juan Antonio López-Villanueva¹  Uwe Meyer-Baese² 

[1] Departamento de Electrónica y Tecnología de Computadores, Centro de Investigación en Tecnologías de la Información y las Telecomunicaciones CITIC-UGR, Universidad de Granada;Department of Electrical and Computer Engineering, FAMU-FSU College of Engineering

关键词: random numbers;    hardware TRNGs;    FPGAs;    ring oscillators;   

DOI  :  10.3390/cryptography7020026

学科分类：社会科学、人文和艺术（综合）

来源: mdpi

【 摘 要 】

The generation of random numbers is crucial for practical implementations of cryptographic algorithms. In this sense, hardware security modules (HSMs) include true random number generators (TRNGs) implemented in hardware to achieve good random number generation. In the case of cryptographic algorithms implemented on FPGAs, the hardware implementation of RNGs is limited to the programmable cells in the device. Among the different proposals to obtain sources of entropy and process them to implement TRNGs, those based in ring oscillators (ROs), operating in parallel and combined with XOR gates, present good statistical properties at the cost of high area requirements. In this paper, these TRNGs are revisited, showing a method for area optimization independently of the FPGA technology used. Experimental results show that three ring oscillators requiring only three LUTs are enough to build a TRNG on Artix 7 devices from Xilinx with a throughput of 33.3 Kbps, which passes NIST tests. A throughput of 50 Kbps can be achieved with four ring oscillators, also requiring three LUTs in Artix 7 devices, while 100 Kbps can be achieved using an structure with four ring oscillators requiring seven LUTs.

【 授权许可】

CC BY