Tunnel FET Analog Benchmarking and Circuit Design

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Wenjun Li¹  Hao Lu¹  Alan Seabaugh¹  Patrick Fay¹  Paolo Paletti¹  Trond Ytterdal² 

[1] Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA;Department of Electronic Systems, Norwegian University of Science and Technology, Trondheim, Norway;

关键词: Analog circuit;    benchmarking;    compact model;    steep subthreshold swing (SS);    tunnel field-effect transistor (TFET);    ultralow-voltage circuit;   

DOI  :  10.1109/JXCDC.2018.2817541

来源: DOAJ

【 摘 要 】

A platform for benchmarking tunnel field-effect transistors (TFETs) for analog applications is presented and used to compare selected TFETs to FinFET technology at the 14-nm node. This benchmarking is enabled by the development of a universal TFET SPICE model and a parameter extraction procedure based on data from physics-based device simulators. Analog figures of merit are computed versus current density to compare TFETs with CMOS for low-power analog applications to reveal promising directions for the system development. To illustrate the design space enabled by TFETs featuring sub-60-mV/decade subthreshold swing, two example circuits including a picopower common-source amplifier and an ultralow-voltage ring oscillator are demonstrated.

【 授权许可】

Unknown