New Compact Modeling Solutions for Organic and Amorphous Oxide TFTs

IEEE Journal of the Electron Devices Society

Firas Mohamed¹  Jan Laurens Van Der Steen²  Micael Charbonneau²  Alexander Kloes³  Slobodan Mijalkovic⁴  Magali Estrada⁴  Benjamin Iniguez⁵  Arokia Nathan⁶  Gerwin Gelinck⁷  Thomas Gneiting⁷  Antonio Cerdeira⁸  Yvan Bonnassieux⁹  Ahmed Nejim^1,10  Gerard Ghibaudo^1,11  Krunoslav Romanjek^1,12 

[1] AdMOS GmbH, Frickenhausen, Germany;CEA-Liten, Grenoble, France;Compentence Center Nanoelectronics and Photonics, Technische Hochschule Mittelhessen-University of Applied Sciences, Giessen, Germany;Department of Electrical Engineering, CINVESTAV, Mexico City, Mexico;Department of Electronic Engineering, University RoviraiI Virgili, Tarragona, Spain;Department of Engineering, University of Cambridge, Cambridge, U.K.;Holst Centre, TNO, Eindhoven, KN, The Netherlands;IMEP-LAHC, INP-Grenoble, Grenoble, France;LPCM/Physics Department, &x00C9;Silvaco Europe Ltd., St. Ives, Cambridgeshire, U.K.;Silvaco France, Montbonnot-Saint Martin, France;cole Polytechnique, Palaiseau, France;

关键词: Thin film transistors;    organic thin film transistors;    semiconductor device modeling;    semiconductor device noise;   

DOI  :  10.1109/JEDS.2021.3106836

来源: DOAJ

【 摘 要 】

We review recent compact modeling solutions for Organic and Amorphous Oxide TFTs (OTFTs and AOS TFTs, respectively), which were developed, under the framework of the EU-funded project DOMINO, to address issues specifically connected to the physics of these devices. In particular, using different approaches, analytical equations were formulated to model the Density of States (DOS), different transport mechanisms, trapping/de-trapping, drain current, stress, capacitances, frequency dispersion and noise. The final TFT models were, after implementation in Verilog-A, validated by means of the design and simulation of test circuits.

【 授权许可】

Unknown