IEEE Photonics Journal | |
Sequential Logic and Pipelining in Chip-Based Electronic-Photonic Digital Computing | |
Jiaqi Gu1  David Z. Pan1  Zheng Zhao1  Richard Soref2  Zhoufeng Ying3  Chenghao Feng3  Ray T. Chen3  | |
[1] Computer Engineering Research Center, The University of Texas at Austin, Austin, Texas, USA;Department of Engineering, University of Massachusetts Boston, Boston, MA, USA;Microelectronics Research Center, The University of Texas at Austin, Austin, Texas, USA; | |
关键词: Optical computing; logic circuits; pipeline processing; optical logic devices; electro-optic devices; | |
DOI : 10.1109/JPHOT.2020.3031641 | |
来源: DOAJ |
【 摘 要 】
The recent rapid progress in integrated photonics has catalyzed the development of integrated optical computing in this post-Moore's law era. Electronic-photonic digital computing, as a new paradigm to achieve high-speed and power-efficient computation, has begun to attract attention. In this paper, we systematically investigate the optical sequential logic and pipelining in electronic-photonic computing, which together offer a solution to potential problems in latency and power budget as the size of electronic-photonic computing circuits scales up considerably to achieve much more complex functions. Pipelining and sequential logic open up the possibility of high-speed very-large-scale electronic-photonic digital computing.
【 授权许可】
Unknown