| IEEE Journal of the Electron Devices Society | |
| Demonstration of Low-Temperature Fine-Pitch Cu/SiO₂ Hybrid Bonding by Au Passivation | |
| Han-Wen Hu1  Po-Chih Chen1  Kuan-Neng Chen1  Tzu-Chieh Chou1  Demin Liu1  | |
| [1] Department of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan; | |
| 关键词: 3D integration; Cu bonding; wafer-level bonding; flip-chip bonding; Au passivation; | |
| DOI : 10.1109/JEDS.2021.3114648 | |
| 来源: DOAJ | |
【 摘 要 】
Fine pitch Cu/SiO2 hybrid bonding has been successfully demonstrated at a low temperature of 120 °C, a breakthrough, using Au passivation method in this work. To explore the bonding mechanism of passivation structures for hybrid bonding in details, Cu-Cu direct bonding with Au passivation on both wafer-level and chip-level has been discussed, including analyses of AFM, SAT, TEM, electrical measurements, and reliability test. Cu/SiO2 hybrid bonding with the fine pitch structure with stable electrical performance can be achieved at low bonding temperature under an atmospheric environment. Accordingly, this Au passivation scheme for Cu/SiO2 hybrid bonding with excellent bonding quality, low thermal budget, and high reliability shows a great feasibility for the 3D IC and heterogenous integration applications.
【 授权许可】
Unknown