IEEE Journal of the Electron Devices Society | |
Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs | |
Erik Lind1  Lars-Erik Wernersson1  Johannes Svensson1  Olli-Pekka Kilpi1  | |
[1] Department of Electrical and Information Technology, Lund University, Lund, Sweden; | |
关键词: Vertical; nanowire; InAs; InGaAs; MOSFET; heterostructure; | |
DOI : 10.1109/JEDS.2018.2878659 | |
来源: DOAJ |
【 摘 要 】
Vertical InAs/InGaAs nanowire MOSFETs are fabricated in a gate-last fabrication process, which allows gate-lengths down to 25 nm and accurate gate-alignment. These devices demonstrate high performance with transconductance of 2.4 mS/μm, high on-current, and off-current below 1 nA/μm. An in-depth analysis of the heterostructure MOSFETs are obtained by systematically varying the gate-length and gate location. Further analysis is done by using virtual source modeling. The injection velocities and transistor metrics are correlated with a quasi-ballistic 1-D MOSFET model. Based on our analysis, the observed performance improvements are related to the optimized gate-length, high injection velocity due to asymmetric scattering, and low access resistance.
【 授权许可】
Unknown