On the Low-Frequency Noise Characterization of Z2-FET Devices

IEEE Access

Carlos Navarro¹  Santiago Navarro¹  Luca Donetti¹  Francisco Gamiz¹  Carlos Marquez¹  Jose L. Padilla¹  Carlos Sampedro¹  Yong-Tae Kim²  Philippe Galy³ 

[1] Department of Electronics, CITIC-UGR and Excellence Research Unit, University of Granada, Granada, Spain;Korea Institute of Science and Technology, Seoul, South Korea;STMicroelectronics, Crolles, France;

关键词: 1T-DRAM;    noise measurement;    p-i-n diodes;    semiconductor device reliability;    silicon on insulator technology;    Z²-FET;   

DOI  :  10.1109/ACCESS.2019.2907062

来源: DOAJ

【 摘 要 】

This paper addresses the low-frequency noise characterization of Z²-FET structures. These double-gated p-i-n diode devices have been fabricated at STMicroelectronics in an ultrathin body and box (UTBB) 28-nm FDSOI technology and designed to operate as 1T-DRAM memory cells, although other applications, as for example electro static discharge (ESD) protection, have been reported. The experimentally extracted power spectral density of current reveals that the high-diode series resistance, carrier number fluctuations due to oxide traps, and gate leakage current are the main noise contributors at high-current regimes. These mechanisms are expected to contribute to the degradation of cell variability and retention time. Higher flicker noise levels have been reported when increasing the vertical electric field. A simple model considering the contribution of the main noise sources is proposed.

【 授权许可】

Unknown