Performance analysis of single-walled carbon nanotube bundle interconnects for three-dimensional integration applications

Micro & nano letters

article

Libo Qian¹  Zhangming Zhu¹  Ruixue Ding¹  Yintang Yang¹ 

[1] Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University

关键词: carbon nanotubes;    equivalent circuits;    integrated circuit interconnections;    integrated circuit modelling;    three-dimensional integrated circuits;    C;    size 10 mm;    size 1 mm;    single-walled carbon nanotube bundle delay;    global level interconnect;    intermediate level interconnect;    wire lengths;    technology scaling;    delay improvement;    optimal wire size;    signal delay;    local level;    through-silicon-via-based 3D integration;    single-walled carbon nanotube bundle interconnect performance;    compact equivalent circuit models;    3D integration applications;    performance analysis;   

DOI  :  10.1049/mnl.2012.0856

学科分类：计算机科学（综合）

来源: Wiley

【 摘 要 】

Compact equivalent circuit models for single-walled carbon nanotube (SWCNT) bundles are described, and the performance of SWCNT bundle interconnects is evaluated and compared with traditional Cu interconnects at different interconnect levels for through-siliconvia-based three-dimensional integration. It is shown that at local level, carbon nanotube bundle interconnects exhibit lower signal delay and smaller optimal wire size. At intermediate and global levels, delay improvement becomes more significant with technology scaling and increasing wire lengths. For 1 mm intermediate and 10 mm global level interconnects, the delay of SWCNT bundles can reach 45.49 and 51.84% of that of Cu wires, respectively.

【 授权许可】

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