TCAD simulation of a double L-shaped gate tunnel field-effect transistor with a covered source–channel

Micro & nano letters

article

Haiwu Xie¹  Hongxia Liu¹  Tao Han¹  Wei Li¹  Shupeng Chen¹  Shulong Wang¹ 

[1] Key Laboratory for Wide-Band Gap Semiconductor Materials and Devices of Education, School of Microelectronics, Xidian University;School of Physics and Electronic Information Engineering, Qinghai Normal University

关键词: elemental semiconductors;    field effect transistors;    tunnelling;    technology CAD (electronics);    silicon;    tunnel transistors;    electronic engineering computing;    TCAD simulation;    L-shaped gate tunnel field-effect transistor;    covered source–channel;    linear tunnelling area;    source overlap length;    covered source depth;    ON-state current;    mixed device-circuit simulations;    DLG-TFET;    longitudinal gate length;    subthreshold characteristics;    interlayer silicon thickness;    current switch ratio;    room temperature;    minimum subthreshold swing;    average subthreshold swing;    inverter circuit;    temperature 293.0 K to 298.0 K;    Si;   

DOI  :  10.1049/mnl.2019.0398

学科分类：计算机科学（综合）

来源: Wiley

【 摘 要 】

In this work, the authors propose and simulate a double L-shaped gate tunnel field-effect transistor (DLG-TFET) with the covered source–channel. The proposed structure improves the ON-state current by increasing the linear tunnelling area and has excellent subthreshold characteristics. The simulation focuses on the performance improvement of the device under different longitudinal gate length L g , interlayer silicon thickness T si , gate and source overlap length L ov , and covered source depth L s . For optimal parameters, the ON-state current of the proposed DLG-TFET increases up to 3.53 × 10 −5 A/μm, and the current switch ratio( I on / I off ) is 4.28 × 10 11 at room temperature, moreover, a minimum subthreshold swing (SSmin) and an average subthreshold swing (SSave) are as low as 32.2 and 52.9 mV/Dec, respectively. Meanwhile, this work uses mixed device-circuit simulations to predict the performance of the inverter circuit implemented with proposed DLG-TFET.

【 授权许可】

CC BY|CC BY-ND|CC BY-NC|CC BY-NC-ND