A wide-range and ultra fast-locking all-digital SAR DLL without harmonic-locking

IEICE Electronics Express

Longxing Shi²  Haiyan Sun²  Zhikuang Cai²  Tailong Xu¹ 

[1] School of Electronics and Information, Anhui University;National ASIC System Engineering Research Center, Southeast University

关键词: delay-locked loop;    successive approximation register-controlled;    harmonic-locking;    ultra fast-locking;   

DOI  :  10.1587/elex.10.20130494

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(5)A novel implementation of the complete all-digital M-b successive approximation register-controlled delay-locked loop (SAR DLL) is presented with wide-range, reduced hardware overhead and close to 50% duty cycle. The proposed SAR DLL adopts the digital-controlled resettable delay line to achieve the ultra fast-locking and eliminate the harmonic-locking issue of the conventional SAR ADDLL in wide-range application. All design units are first described in verilog, and then mapped to silicon using the SMIC 0.18μm CMOS Artisan standard cell library.

【 授权许可】

Unknown