Precise time-difference repetition for TDC with delay mismatch cancelling scheme

IEICE Electronics Express

Inseok Kong¹  Kyung-Sub Son¹  Kyongsu Lee¹  Jin-Ku Kang¹ 

[1] Dept. of Electronic Engineering, Inha University

关键词: time-to-digital converter (TDC);    time amplifier (TA);    successive approximation register TDC (SAR-TDC);    digital PLL;    delay mismatch;   

DOI  :  10.1587/elex.12.20150752

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(6)This paper presents a precise time-difference repetition technique to enhance the timing accuracy in repetition based time-to-digital converters (TDC). In the proposed scheme, any delay mismatches during timing difference repetition process can be removed. The proposed circuit could be used for multi-step TDC, delta-sigma TDC, and SAR-type TDC. The proposed scheme was designed and simulated with a 65-nm CMOS process. The proposed circuit shows a delay variation of about 100 fs in the presence of device mismatches, which is much less than that of conventional approaches. The input time range and the conversion rate is 480 ps and 100 Msps if applied to a 2-step TDC, respectively.

【 授权许可】

Unknown