期刊论文详细信息
IEICE Electronics Express | |
Fully parallel comparator for the moduli set {2n,2n-1,2n+1} | |
Omid Mirmotahari3  Mehdi Hosseinzadeh1  Shiva Taghipour Eivazi2  | |
[1] Science and Research Branch, Islamic Azad University;Department of Computer Engineering, Science and Research Branch, Islamic Azad University;Nanoelectronic System Group at the Department of Informatics, University of Oslo | |
关键词: residue number system; reverse converter; binary comparator; | |
DOI : 10.1587/elex.8.897 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(4)Cited-By(4)A novel circuit based on sign detection is introduced in this paper which uses the subtraction for comparing two numbers without carrying out a full comparison and conversion. Thus, the proposed schema decreases the delay significantly using only a little redundant hardware in contrast to previous works. Also the time complexity of the new design has the best results comparing to the previous work.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300653877ZK.pdf | 379KB | download |