An improved reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1}

IEICE Electronics Express

Amir Sabbagh Molahosseini¹  Mehdi Hosseinzadeh¹  Keivan Navi² 

[1] Ph.D Student, Science & Research Branch, Islamic Azad University (IAU);Department of Electrical and Computer Engineering, Shahid Beheshti University

关键词: residue number system;    reverse converter;    VLSI architectures;   

DOI  :  10.1587/elex.5.672

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(6)Cited-By(12)In this paper, a new reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1} is presented. We improved a previously introduced reverse converter architecture for deriving a high-speed hardware design. Hardware architecture of the proposed converter is based on adders, without the need for ROM or Multiplier. The presented design resulted in a significant reduction in conversion delay in comparison to the last reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1}.

【 授权许可】

Unknown