Current mode sigma-delta modulator designed with the help of transistor’s size optimization tool

Bulletin of the Polish Academy of Sciences. Technical Sciences

P. ?niata?aCorresponding authorPozna? University of Technology, 3A Piotorowo St., 60-965 Pozna?, PolandEmailOther articles by this author:De Gruyter OnlineGoogle Scholar¹  A. HandkiewiczPozna? University of Technology, 3A Piotorowo St., 60-965 Pozna?, PolandOther articles by this author:De Gruyter OnlineGoogle Scholar¹  M. NaumowiczPozna? University of Technology, 3A Piotorowo St., 60-965 Pozna?, PolandOther articles by this author:De Gruyter OnlineGoogle Scholar¹  S. Szcz?snyPozna? University of Technology, 3A Piotorowo St., 60-965 Pozna?, PolandOther articles by this author:De Gruyter OnlineGoogle Scholar¹  N. PaulinoUNINOVA/CTS, Universidade Nova de Lisboa, 2829-516 Caparica, PortugalOther articles by this author:De Gruyter OnlineGoogle Scholar²  J. GoesUNINOVA/CTS, Universidade Nova de Lisboa, 2829-516 Caparica, PortugalOther articles by this author:De Gruyter OnlineGoogle Scholar²  J.L.A. de MeloUNINOVA/CTS, Universidade Nova de Lisboa, 2829-516 Caparica, PortugalOther articles by this author:De Gruyter OnlineGoogle Scholar² 

[1] Pozna? University of Technology, 3A Piotorowo St., 60-965 Pozna?, Poland;UNINOVA/CTS, Universidade Nova de Lisboa, 2829-516 Caparica, Portugal

关键词: Keywords: sigma-delta;    current comparator;    CAE;   

DOI  :  10.1515/bpasts-2015-0104

学科分类：工程和技术（综合）

来源: Polska Akademia Nauk * Centrum Upowszechniania Nauki / Polish Academy of Sciences, Center for the Advancement of Science

【 摘 要 】

The paper presents a second order current mode sigma-delta modulator designed with the help of a new elaborated tool to optimize the transistor sizes. The circuit is composed of two continuous time loop filters, a current comparator and a one bit DAC with a current output. The resulting circuit, designed in a 65 nm 1.2 V CMOS technology, has a bandwidth of 2 MHz for a clock frequency of 250 MHz. The electrical simulation results show that it achieves a maximum signal-to-noise-plus-distortion ratio (SNDR) of 53.6 dB while dissipating 93 μW, which corresponds to an efficiency of 59.7 fJ/conv. The fully current mode structure makes the circuit suitable to be applied in a current mode signal processing like biosensors or image pixels arrays.

【 授权许可】

Unknown