期刊论文详细信息
ETRI Journal
Pipelined Macroblock Processing to Reduce Internal Buffer Size of Motion Estimation in Multimedia SoCs
关键词: motion estimation;    internal buffer size reduction;    SoC;    VLSI;    Multimedia;   
Others  :  1184729
DOI  :  10.4218/etrij.03.0303.0013
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【 摘 要 】

A multimedia SoC often requires a large internal buffer, because it must store the whole search window to reduce the huge I/O bandwidth of motion estimation. However, the silicon area of the internal buffer increases tremendously as the search range becomes larger. This paper proposes a new method that greatly reduces the internal buffer size of a multimedia SoC while the computational cost, I/O bandwidth, and image quality do not change. In the proposed method, only the overlapped parts of search windows for consecutive macroblocks are stored in the internal buffer. The proposed method reduces the internal buffer size to 1/5.0 and 1/8.8 when the search range is ±64 ×±64 and ±128 ×±128, respectively.

【 授权许可】

   

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【 参考文献 】
  • [1]J. Jain and A. Jain, "Displacement Measurement and its Application in Interframe Image Coding," IEEE Trans. Commun., vol. COM-29, no. 12, Dec. 1981, pp. 1799-1808.
  • [2]ISO/IEC JTC1/SC29/WG11 13818-1, Coding of Moving Pictures and Associated Audio, Nov. 1994.
  • [3]CCITT SG XV, Recommendation H.261-Video Codec for Audiovisual Services at p*64 kbit/s, Aug. 1990.
  • [4]T. Koga, "Motion Compensated Interframe Coding for Video-Conferencing," Proc. National Telecommunication Conf., 1981, pp. G5.3.1-G5.3.5.
  • [5]M. Chen, L. Chen, and T. Chiueh, "One-Dimensional Full Search Motion Estimation Algorithm for Video Coding," IEEE Trans. Circuits Syst. for Video Technol., vol. 4, no. 5, Oct. 1994, pp. 504-509.
  • [6]B. Liu and A. Zaccarin, "New Fast Algorithms for the Estimation of Block Motion Vectors," IEEE Trans. Circuits Syst. Video Technol., vol. 3, no. 2, Apr. 1993, pp. 148-157.
  • [7]M. Biering, "Displacement Estimation by Hierarchical Block Matching," Proc. SPIE Visual Communication and Image Processing, 1988, pp. 942-951.
  • [8]H. Jong, L. Chen, and T. Chiueh, "Accuracy Improvement and Cost Reduction of 3-Step Search Block Matching Algorithm for Video Coding," IEEE Trans. Circuits Syst. Video Technol., vol. 4, no. 1, Feb. 1994, pp. 88-90.
  • [9]H. Lin and B. Petryna, "A 14 GOPS Programmable Motion Estimator for H.26x Video Coding," Proc. Int’l Solid-State Circuits Conf., 1996, pp. 246-247.
  • [10]T. Onoye et al., "Single Chip Implementation of Motion Estimator Dedicated to MPEG2 MP@HL," IEICE Trans. Fundamentals, vol. E79-A, no. 8, Aug. 1996, pp. 1210-1216.
  • [11]M. Mizuno et al., "A 1.5-W Single Chip MPEG-2 MP@ML Video Encoder with Low Power Motion Estimation and Clocking," IEEE J. of Solid-State Circuits, vol. 32, no. 11, Nov. 1997, pp. 1807-1816.
  • [12]P. Kuhn et al., "A Flexible Low-Power VLSI Architecture for MPEG-4 Motion Estimation," Proc. SPIE Visual Communication and Image Processing, 1999, pp. 883-894.
  • [13]Y. Lai, "A Memory Efficient Motion Estimator for Three Step Search Block-Matching Algorithm," IEEE Trans. Consumer Electron., vol. 47, no. 3, Aug. 2001, pp. 644-651.
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