Interfacial and Electrical Properties of Ge MOS Capacitor by ZrLaON Passivation Layer and Fluorine Incorporation

2017 2nd International Conference on Advanced Materials Research and Manufacturing Technologies

材料科学;机械制造

Huang, Yong^1,2 ; Xu, Jing-Ping^1 ; Liu, Lu^1 ; Cheng, Zhi-Xiang^1 ; Lai, Pui-To^3 ; Tang, Wing-Man^4

School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan

430074, China^1

School of Information and Engineering, Hubei University for Nationalities, Enshi, Hubei

445000, China^2

Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong^3

Department of Applied Physics, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong^4

关键词: Capacitance voltage;    Frequency dispersion;    Gate-leakage current;    Interface state density;    Metal oxide semiconductor;    Passivation layer;    Stacked gate dielectrics;    Suppressed growths;   

Others  :  https://iopscience.iop.org/article/10.1088/1757-899X/229/1/012018/pdf
DOI  :  10.1088/1757-899X/229/1/012018

学科分类：材料科学（综合）

来源: IOP

【 摘 要 】

Ge Metal-Oxide-Semiconductor (MOS) capacitor with HfTiON/ZrLaON stacked gate dielectric and fluorine-plasma treatment is fabricated, and its interfacial and electrical properties are compared with its counterparts without the ZrLaON passivation layer or the fluorine-plasma treatment. Experimental results show that the sample exhibits excellent performances: low interface-state density (3.7×1011cm-2eV-1), small flatband voltage (0.21 V), good capacitance-voltage behavior, small frequency dispersion and low gate leakage current (4.41×10-5A/cm2at Vg= Vfb+ 1V). These should be attributed to the suppressed growth of unstable Ge oxides on the Ge surface during gate-dielectric annealing by the ZrLaON interlayer and fluorine incorporation, thus greatly reducing the defective states at/near the ZrLaON/Ge interface and improving the electrical properties of the device.