27th IUPAP Conference on Computational Physics | |
Designing reversible arithmetic, logic circuit to implement micro-operation in quantum computation | |
物理学;计算机科学 | |
Kalita, Gunajit^1 ; Saikia, Navajit^1 | |
Department of Electronics and Telecommunication Engineering, Assam Engineering College, Jalukbari, Guwahati-13 | |
Assam, India^1 | |
关键词: Logic operations; Low-power consumption; Micro-operation; Quantum Computing; Quantum costs; Reversible circuits; Reversible gates; Reversible Logic; | |
Others : https://iopscience.iop.org/article/10.1088/1742-6596/759/1/012097/pdf DOI : 10.1088/1742-6596/759/1/012097 |
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学科分类:计算机科学(综合) | |
来源: IOP | |
【 摘 要 】
The futuristic computing is desired to be more power full with low-power consumption. That is why quantum computing has been a key area of research for quite some time and is getting more and more attention. Quantum logic being reversible, a significant amount of contributions has been reported on reversible logic in recent times. Reversible circuits are essential parts of quantum computers, and hence their designs are of great importance. In this paper, designs of reversible circuits are proposed using a recently proposed reversible gate for arithmetic and logic operations to implement various micro-operations (simple add and subtract, add with carry, subtract with borrow, transfer, incrementing, decrementing etc., and logic operations like XOR, XNOR, complementing etc.) in a reversible computer like quantum computer. The two new reversible designs proposed here for half adder and full adders are also used in the presented reversible circuits to implement various microoperations. The quantum costs of these designs are comparable. Many of the implemented micro-operations are not seen in previous literatures. The performances of the proposed circuits are compared with existing designs wherever available.
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