Architecture of the multichannel data-driven ASIC

International Conference on Particle Physics and Astrophysics

Normanov, D.D.^1 ; Atkin, E.V.^1

National Research Nuclear University MEPhI (Moscow Engineering Physics Institute), Kashirskoe highway 31, Moscow

115409, Russia^1

关键词: Analog signals;    Cross point;    Detector signals;    High Speed;    Lower-power consumption;    Multichannel data;    Output data;    Processing channels;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/675/4/042040/pdf
DOI  :  10.1088/1742-6596/675/4/042040

来源: IOP

【 摘 要 】

The development architecture of a multichannel data-driven ASIC is presented. It provides the selection of useful events at an early stage of reading out detector signals. The architecture is based on fast cross-point switches of analog signals, followed by their digitization by a limited set of ADCs and high-speed output data serialization. Such approach reduces the number of subsequent ADCs as well as digital processing channels. That leads to lower power consumption and chip area. The results of a prototype ASIC development, based on this architecture and intended for the CBM experiment at FAIR, are given.