An Efficient FPGA Parallel Implementation for 2-D MUSIC Algorithm

2018 4th International Conference on Environmental Science and Material Application

生态环境科学;材料科学

Shi, Haoqiang^1 ; Jiang, Zhanjun^1 ; Liu, Qianru^1 ; Cai, Xiaoyu^1

School of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou

730070, China^1

关键词: Efficient implementation;    Engineering implementation;    High application value;    Implementation scheme;    Jacobi transformation;    Parallel implementations;    Signal classification;    Two Dimensional (2 D);   

Others  :  https://iopscience.iop.org/article/10.1088/1755-1315/252/3/032168/pdf
DOI  :  10.1088/1755-1315/252/3/032168

来源: IOP

【 摘 要 】

The multi signal classification (MUSIC) algorithm is a classical one in the direction estimation of radar. An highly efficient implementation scheme is proposed in this paper. In order to solve the problem that computing two-dimensional(2-D) MUSIC algorithm is not fast enough in engineering implementation and the resource consumption is large, and we have completed the simulation implementation of the algorithm on field programmable gate array (FPGA). Through the analysis of the steps of Jacobi transformation, a high efficient serial control scheme is proposed to realize Jacobi transformation, and the characteristic value decomposition is realized by using cyclic Jacobi iterative algorithm. This design avoids finding the most value through threshold comparison, reduces the hardware complexity and improves the decomposition speed. In spectral peak search, a parallel computing method is presented, which realizes parallel 2-D spectral peak search through spatial division, this method can effectively improve the effectiveness of search, and also can achieve the estimation of the target at the junction of airspace. Compared with the traditional implementation scheme, the design scheme has the advantages of high precision, high real time and saving hardware resources. Theoretical analysis and MATLAB simulation test show that this method and its FPGA design have good performance and have high application value in the practical process.