Modeling and design for energy-efficient spintronic logic devices and circuits

Spintronic;Logic devices;Machine learning;MRAM;All-spin logic device;Neural networks;Spin-transfer torque;Topological insulator;Transducer;CMOS;Spin-Hall effect;Magnetostriction;Magnetostrictive switching;ISHE;Inverse Rashba Edelstein Effect;Interconnects;Benchmarking;SPICE;Modeling;non-Boolean computation;Boolean logic;Spin current;Magnetization switching;Thermal noise;Oscillators;Coupled-oscillator;Image recognition;Pattern recognition;Piezoelectric

Mousavi Iraei, Rouhollah ; Naeemi, Azad Electrical and Computer Engineering Kenney, James Davis, Jeffrey First, Phillip Jiang, Zhigang ; Naeemi, Azad

University:Georgia Institute of Technology

Department:Electrical and Computer Engineering

关键词: Spintronic;    Logic devices;    Machine learning;    MRAM;    All-spin logic device;    Neural networks;    Spin-transfer torque;    Topological insulator;    Transducer;    CMOS;    Spin-Hall effect;    Magnetostriction;    Magnetostrictive switching;    ISHE;    Inverse Rashba Edelstein Effect;    Interconnects;    Benchmarking;    SPICE;    Modeling;    non-Boolean computation;    Boolean logic;    Spin current;    Magnetization switching;    Thermal noise;    Oscillators;    Coupled-oscillator;    Image recognition;    Pattern recognition;    Piezoelectric;   

Others  :  https://smartech.gatech.edu/bitstream/1853/63481/1/MOUSAVIIRAEI-DISSERTATION-2018.pdf

美国|英语

来源: SMARTech Repository

【 摘 要 】

The objective of the proposed research is the modeling and the design of energy-efficient and scalable novel spintronic devices. Over the past two decades, spintronic devices have achieved special status due to their advantages in terms of low-voltage operation, smaller footprint area, non-volatile memory, and compatibility with CMOS technology. To design efficient spin-based systems, researchers require the precise modeling of the physics of nanomagnets, piezoelectrics, thermal noise, and metallic nanowires. Using the models developed during the research, spintronic logic devices comprised of hybrid magnetic and piezoelectric structures are proposed. The delay, energy dissipation, and footprint area of the proposed devices are analyzed. Moreover, the proposed devices are used as building blocks to propose spin-based logic gates, pattern and image recognition circuits, long-range interconnects, interface circuits, and coupled-oscillators. The performance of the proposed circuits is benchmarked against CMOS and other spin-based circuits, which shows improved performance, especially in implementing non-Boolean applications and interface circuits.