Yang, Hyung Suk ; Bakir, Muhannad S. Electrical and Computer Engineering Brand, Oliver Joshi, Yogendra Davis, Jeff Thacker, Hiren Meindl, James D. ; Bakir, Muhannad S.
A novel large-scale silicon system platform with 9.6cm² of active silicon interposer area is demonstrated. The platform contains three interposer tiles and two silicon bridges, and a novel self-alignment technology utilizing positive self-alignment structures (PSAS) and a novel mechanically flexible interconnect (MFI) technology are developed and used to align and interconnect tiles and bridges on an FR4 substrate. An accurate alignment < 8μm between silicon bridges and interposer tiles makes it possible to accommodate nanophotonics to enable a high bandwidth and low-energy system in the future. In addition, mechanically flexible interconnects and silicon bridges are used to provide electrical connections between interposer tiles without having to use motherboard-level interconnects. Finally, an elastomeric bump interposer is developed to enable the packaging of PSAS-enabled silicon systems, and PSAS' compatibility with a thermo-compression bonding process is demonstrated to enable a wide range of system configurations involving interposer tiles and bridges, including the multi-chip package configuration used with the elastomeric bump interposers.
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Large-scale silicon system technologies: through-silicon vias, mechanically flexible interconnects, and positive self-alignment structures