High-efficiency performance is one of the most important requirements of poweramplifiers (PAs) for wireless applications. However, the design of highly efficient CMOSPAs for watt-level applications is a challenging task. This dissertation focuses on thedevelopment of the design method for highly efficient CMOS PAs to overcome thefundamental difficulties presented by CMOS technology.In this dissertation, the design method and analysis for a high-power and highefficiencyclass-E CMOS PA with a fully integrated transformer have been presented.This work is the first effort to set up a comprehensive design methodology for a fullyintegrated class-E CMOS PA including effects of an integrated transformer, which isvery crucial for watt-level power applications. In addition, to improve efficiency ofcascode class-E CMOS PAs, a charging acceleration technique is developed. The methodaccelerates a charging speed to turn off the common-gate device in the off-state, thusreducing the power loss. To demonstrate the proposed cascode class-E PA, a prototypeCMOS PA was implemented in a 0.18-μm CMOS process. Measurements show animprovement of approximately 6% in the power added efficiency. The proposed cascodeclass-E PA structure is suitable for the design of high-efficiency class-E PAs while itreduces the voltage stress across the device.
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High efficiency switching CMOS power amplifiers for wireless communications