The SPDT switch is implemented by two integrated vertical-structure power MOSFETs for the first time. In other words, a high current handling monolithic synchronous converter, based on both a control and a synchronous vertical MOSFET structure is proposed. The power switches are designed as combining the advantages of both conventional lateral- and vertical-type MOSFETs. Therefore, the lowest FOMs among the same voltage-rating devices as well as the high operating current handling capability have been achieved. Besides, various integrated devices such as analog/digital Complementary Metal Oxide Semiconductor(CMOS)s and Bipolar Junction Transistor(BJT)s show good performances as power stage driver and controller ones at the same time. In addition, the new monolithic design challenges such as isolations and parasitic devices are addressed and possible solutions are verified not only by state of the art device/circuit simulations but also by experiments. The new concept of the controlled CMOS p-body voltage which can subdue the parasitic effects dramatically and increase the reliability providing full flexibility of integration is explained, also. Eventually, novel BCD(Bipolar-CMOS-DMOS) process which is optimized to achieve all goals above is developed. And the most challengeable none-standard CMOS process of the current path-trench fabrication is investigated in details and tested physically and electrically. Though the buck converter is selected and analyzed in details in this dissertation due to its popularity, the proposed SPDT switch can be used for other SMPS(Swith Mode Power Supply) converters such as a boost or a buck-boost converter, also. Therefore, this dissertation should build a strong motivation for the practical implementation of the new SOC(System On a Chip)-high current and fast frequency handling power converter design for the first time.
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Integrated Single Pole Double Throw (SPDT) Vertical Power MOSFETs for High Current and Fast Frequency Monolithic Synchronous Converters