Development of a Block Floating Point Interval ALU for DSP and Control Applications

arithmetic logic unit range asic hardware verilog

Hattangady, Sandeep Krishnanand ; Dr. William W. Edmonson, Committee Chair,Dr. Winser E. Alexander, Committee Member,Dr. William Rhett Davis, Committee Member,Hattangady, Sandeep Krishnanand ; Dr. William W. Edmonson ; Committee Chair ; Dr. Winser E. Alexander ; Committee Member ; Dr. William Rhett Davis ; Committee Member

University:North Carolina State University

关键词: arithmetic logic unit range asic hardware verilog;   

Others  :  https://repository.lib.ncsu.edu/bitstream/handle/1840.16/1599/etd.pdf?sequence=1&isAllowed=y

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