Detection of ESD-induced soft errors

Bit flips;ESD;microcontroller;soft errors;Rail clamp;Phase margin

Mysore Vijayaraj, Prajwal ; Rosenbaum ; Elyse

关键词: Bit flips;    ESD;    microcontroller;    soft errors;    Rail clamp;    Phase margin;   

Others  :  https://www.ideals.illinois.edu/bitstream/handle/2142/101631/MYSOREVIJAYARAJ-THESIS-2018.pdf?sequence=1&isAllowed=y

美国|英语

来源: The Illinois Digital Environment for Access to Learning and Scholarship

【 摘 要 】

IEC-61000-4-2 compliant ESD discharges are performed on a microcontroller. The effect of ESD-induced noise on adigital system having a workload is examined. UART interface present on-chip is used for memory and register readout. Hardware voltage monitors developed previously are included in the design to report the on-die supply noise. A correlation between the voltage disturbance and soft errors induced is identified. The threshold for such disturbances is found. The results are validated across multiple chips. Memory elements are found to be more immune than registers.