Neuromorphic Computation Circuits for Ultra-Dense Mobile Platforms

low power;neuromorphic;ultra dense;non-volatile;subthreshold;analog computation;Electrical Engineering;Engineering;Electrical Engineering

Fick, LauraZhang, Zhengya ;

University of Michigan

关键词: low power;    neuromorphic;    ultra dense;    non-volatile;    subthreshold;    analog computation;    Electrical Engineering;    Engineering;    Electrical Engineering;   

Others  :  https://deepblue.lib.umich.edu/bitstream/handle/2027.42/135874/lfreyman_1.pdf?sequence=1&isAllowed=y

瑞士|英语

来源: The Illinois Digital Environment for Access to Learning and Scholarship

【 摘 要 】

Ultra-dense mobile platforms have the potential to be a ubiquitous form of computing. From low-power voice recognition for wearables to high speed image recognition for self-driving cars, the mobile platform space has a wide range of requirements. These different area, power, and speed requirements necessitate a computing platform that is highly scalable, ultra-dense, and with the potential for low-power operation. Neural networks are currently the leading algorithms for recognition problems - taking in many inputs and correlating against learned weights, these algorithms are able to make informed decisions off of a large amount of generalized data.Neural network algorithms are facilitating the advancement of intelligent systems through highly parallel, large-scale processing of sensor inputs. These algorithms are memory intensive, reading out neuron weights for every computation. In digital implementations, total energy consumption is dominated by the amount and frequency of memory reads. Each neuron typically has between hundreds and thousands of 8-bit synaptic weights, and a neuron layer has hundreds of neurons, resulting in thousands of weights per layer. Each weight is accessed once per neuron computation. Because these weight accesses are one time use there is little temporal locality that can be exploited to reduce the total energy consumption. Implementing state-of-the-art neural networks in ultra-dense form factors will require large energy improvements over current architectures, near 100x to operate in battery-powered systems.Traditionally we could expect constant energy improvements through ideal constant field scaling. However, achieving 100x reduction would take 35 process steps, as energy scales roughly at 1/S^3. Recent years have seen an end to ideal constant field scaling, with supply voltage and threshold voltage scaling tapering off, providing diminishing returns. This dissertation works to address the limitations of memory accesses and energy inherent to neural networks through storing weights in on-chip non-volatile arrays and combining read-out and calculation current to amortize energy costs.To further advance the development of neural networks in the ultra-dense mobile platform space, this work proposes four projects: a high-speed ultra-dense neural network accelerator, an ultra-low power subthreshold neural network accelerator, an ultra-dense scalable sensor interface, and a low power gigabit receiver equalizer.