Time-Based Analog to Digital Converters.

Analog-to-Digital Converter;Time-to-Digital Converter;Electrical Engineering;Engineering;Electrical Engineering

Naraghi, ShahrzadWise, Kensall D. ;

University of Michigan

关键词: Analog-to-Digital Converter;    Time-to-Digital Converter;    Electrical Engineering;    Engineering;    Electrical Engineering;   

Others  :  https://deepblue.lib.umich.edu/bitstream/handle/2027.42/64787/naraghi_1.pdf?sequence=1&isAllowed=y

瑞士|英语

来源: The Illinois Digital Environment for Access to Learning and Scholarship

【 摘 要 】

Low-power, small analog-to-digital converters (ADCs) have numerous applications in areas ranging from power-aware wireless sensing nodes for environmental monitoring to biomedical monitoring devices in point-of-care (PoC) instruments. The work focuses on ultra-low-power, and highly integrated implementations of ADCs, in nanometer-scale complementary metal-oxide-semiconductor (CMOS) very large scale (VLSI) integrated circuit fabrication technologies. In particular, we explore time-based techniques for data conversion, which can potentially achieve significant reductions in power consumption while keeping silicon chip area small, compared to today’s state-of-the-art ADC architectures. Today, digital integrated circuits and digital signal processors (DSP) are taking advantage of technology scaling to achieve improvements power, speed, and cost.Meanwhile, as technology scaling reduces supply voltage and intrinsic transistor gain, analog circuit designers face disadvantages.With these disadvantages of technology scaling, two new broad trends have emerged in ADC research. The first trend is the emergence of digitally-assisted analog design, which emphasizes the relaxation of analog domain precision and the recovering accuracy (and performance) in the digital domain.This approach is a good match to the capabilities of fine line technology and helps to reduce power consumption.The second trend is the representation of signals, and the processing of signals, in the timedomain.Technology scaling and its focus on high-performance digital systems offers better time resolution by reducing the gate delay.Therefore, if we represent a signal as a period of time, rather than as a voltage, we can take advantage of technology scaling, and potentially reduce power consumption and die area.This thesis focuses on pulse position modulation (PPM) ADCs, which incorporate time-domain processing and digitally assisted analog circuitry.This architecture reduces power consumption and area significantly, without sacrificing performance.The input signal is pulse position modulated and the analog information is carried in the form of timing intervals. Timing measurement accuracy presents a major challenge and we present various methods in which accuracy can be achieved using CMOS processes.This ;;digital’ approach is more power efficient compared with pure analog solutions, utilized for amplitude measurement of input signals.