Current Contour Based Design Methodology for IMN Design of Doherty Power Amplifiers

GaN;Doherty;broadband;power amplifier;high efficiency;Electrical and Computer Engineering;Electrical and Computer Engineering

Patel, Kasyap

University of Waterloo

关键词: GaN;    Doherty;    broadband;    power amplifier;    high efficiency;    Electrical and Computer Engineering;    Electrical and Computer Engineering;   

Others  :  https://uwspace.uwaterloo.ca/bitstream/10012/9669/1/Patel_Kasyap.pdf

瑞士|英语

来源: UWSPACE Waterloo Institutional Repository

【 摘 要 】

Carrier aggregation (CA) is used in modern communication schemes to increase com- munication bandwidth (BW) and reduce redundant equipment. This combined with the already high peak to average power ratio (PAPR) signals in use for complex modulation schemes results in stringent linearity requirements and degradation in the average drain efficiency (DE) in basic power amplifier (PA) topologies. This has led to research interests in highly efficient broadband PAs capable of addressing the bandwidth and multi-standard requirements. Several techniques have been developed to enhance the efficiency of PAs when driven by a modulated signal with high PAPR, but amongst them the Doherty power amplifier (DPA) has garnered considerable attention in research and commercial adoption.In this work the importance of the current profiles at the drain of the main and peaking amplifier in the DPA is examined. By looking at the effect of the nonlinear capacitance at the input of the transistor, it is seen that choice of impedance presented at the fundamental and second harmonic have a drastic effect on the performance of the overall PA. To combat these issues, the constant current circle is introduced to aid in the design of the input matching network (IMN) of the main and peaking. By using the current contours the fundamental drain current can be carefully dictated by presenting the correct impedance at the gate of the transistor versus frequency and input drive. Using the current contours in conjunction with the design methodology outlined allows for the simple design of DPA IMN to extract the most performance out of the output combining node (OCN).To validate the introduced material a 12-W 3.0-5.0GHz DPA was constructed using GaN HEMT transistors. The simulation results showed that the current profiles remained within range when using an iterative design approach along with current contours. Measurement results showed that the PA was able to achieve a gain of 8dB within the designed band. As well the efficiency at both peak and BO was greater than 37% across the band. To show the performance of the PA under modulated signal, the PA was tested with a 80MHz intra- band non-contguous signal at 3.3GHz. Before DPD the reported ACLR was 37dBc/Hz. Applying a DPD engine, the ACLR was brought down to 48dBc/Hz, or the noise floor of the equipment.