Hardware implementation for reduction ofPAPR by using modified PTS technique

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering

article

Uday Wali¹  B. K. Shiragapur²  Kalyani G. Fule³  Mahesh Tarlkar³ 

[1] Dr. Uday Wali, Dept. of E&C , KLE College of Engg. & Tech.Belgaum Karnataka;Dept. of E&Tc, Dr. D. Y. Patil School of Engg.;Dept. of E&Tc, Dr.D. Y. Patil School of Engg.

关键词: Hamming Codes;    Reed-Solomon codes;    EG-LPDC (Euclidean geometry-low density parity check) codes;    Error correction codes (ECCs);    Fault secure Detector (FSD);    and flash memories;   

来源: Research & Reviews

【 摘 要 】

In this paper, the design and implementation of OFDM system along with Multi-Point Square Mapping combined with PTS (M-PTS) technique has received much attention in reducing the high peak to average power ratio (PAPR) of Orthogonal Frequency Division Multiplexing signals (OFDM). As compared to C-PTS technique, the proposed M-PTS technique needs not to submit side information but keeping almost the same performance of PAPR reduction as the C-PTS technique. A detailed Simulation of OFDM system is conducted and implemented using FPGA to validate the results.

【 授权许可】

Unknown