Streaming Accelerator Design for Regular Expression on CPU+FPGA Embedded System

ECTI Transactions on Computer and Information Technology

article

Hendarmawan¹  Morihiro Kuga¹  Masahiro Iida¹ 

[1] Kumamoto University

关键词: Stream processing;    Pattern Matching;    Complex Event Processing;    Hardware Accelerator;   

DOI  :  10.37936/ecti-cit.2022164.249268

学科分类：医学（综合）

来源: Electrical Engineering/Electronics, Computer, Communications and Information Technology Association

【 摘 要 】

A pattern matching application is one of the necessary tasks in streaming data processing. A hardware accelerator employing FPGA can be faster than a general-purpose processor in performing data pattern matching using regular expression methods. However, it is difficult and time-consuming to design the hardware on the FPGA for each regular expression pattern. We are researching a method for automatically designing hardware accelerators for higher efficiency and performance to improve user productivity. In this research, we propose rules and methods for translating regular expression patterns into supported hardware code as our contribution to providing an efficient design method for regular expression hardware accelerators and allowing the efficient utilization of FPGAs. The performance evaluation is compared with the regular expression algorithm on ARM processors, CPU servers, and FPGA data streaming applications. Our result shows that our FPGA accelerator enables speeding up data streaming applications on CPU processors. Our solution is 733 times faster than optimized C/C++ code. It is 70 times faster than using the Python library. It is twice as fast as PYNQ-Z2 and 1.5 faster than RE2C. Furthermore, our proposed accelerator Ultra-96 improves the performance 2 times with an 8[MB/J] high energy efficiency from the previous PYNQ-Z2 approach.

【 授权许可】

CC BY-NC-ND