An Efficient Algorithm for Mapping Real Time Embedded Applications on NoC Architecture

IEEE Access

Muhammad Khalil Afzal¹  Tariq Umer¹  Sheraz Anjum¹  Sarzamin Khan²  Usman Ali Gulzari³  Farruh Ishmanov⁴ 

[1] Department of Computer Science, COMSATS Institute of Information Technology, Wah Cantonment, Pakistan;Department of Electrical Engineering, COMSATS Institute of Information Technology, Wah Cantonment, Pakistan;Department of Electrical Engineering, The University of Lahore, Islamabad, Pakistan;Department of Electronics and Communication Engineering, Kwangwoon University, Seoul, South Korea;

关键词: Algorithm;    branch & bound;    mapping;    network-on-chip;    optimization;   

DOI  :  10.1109/ACCESS.2018.2811716

来源: DOAJ

【 摘 要 】

Network-on-chip (NoC) has appeared to be an impending substitute for the communication paradigm in modern very large scale integration embedded systems. Apart from many design challenges, application mapping on the NoC system is one of the most intractable and challenging optimization problems. In this paper, we propose a hybrid, branch & bound (BB)-based exact mapping (BEMAP) algorithm, for mapping real-time embedded applications on the NoC architecture. The BEMAP optimizes the latency and throughput of the NoC system and minimizes power consumption under the bandwidth constraint. This method utilizes the modular exact and systematic search optimization techniques to obtain a multi-objective optimized solution to the mapping problem of the NoC designs. The proposed algorithm exploits the state-of-the-art BB algorithm, in order to obtain optimized results against its competitors. Experimental results under the benchmarks of several real-time embedded applications show that the proposed algorithm achieves up to 19.93% savings in power consumption and 61.10% improvement in network latency for two dimension mesh and torus topologies.

【 授权许可】

Unknown