A 17.6-nW 35.7-ppm/°C Temperature Coefficient All-SVT-MOSFET Subthreshold Voltage Reference in Standard 0.18-μm N-Well CMOS

IEEE Access

Xingyuan Tong¹  Andi Yang²  Siwan Dong³ 

[1] Electronics Engineering Department, Xi&x2019;an University of Posts and Telecommunications, Xi&x2019;an, China;

关键词: pMOS-bulk-driven;    temperature compensation;    line regulation;    subthreshold;    nanowatt;    voltage reference;   

DOI  :  10.1109/ACCESS.2020.2995352

来源: DOAJ

【 摘 要 】

This paper presents a low-power, low-voltage, and low-temperature-coefficient (TC) MOSFET-only subthreshold voltage reference circuit based on a standard 0.18-μm n-well CMOS process. The circuit consists of two novel current generators and an I/V conversion circuit with temperature compensation. Under the control of a proposed pMOS-bulk-driven (PBD) temperature compensation circuit, two pMOSFETs operating in a linear region act as resistors with different TCs and can be used for PTAT and CTAT current generation. Owing to the PBD technique and the subthreshold operating method, these two current generators and the I/V conversion circuit can operate at low voltage. The proposed reference circuit is realized with only standard V_TH (SVT) MOS devices. The measurement results show that it can operate at a minimum supply voltage of 0.5 V. The line sensitivity is 0.09% for supply voltages between 0.5 and 1.8 V. The PSRR measured at 100 Hz is 51.8 dB. A measurement of 20 samples indicates that the average TC is 35.7 ppm/°C across a temperature range of -40 to 85 °C. The proposed circuit consumes 17.6 nW from a 0.5-V power supply and occupies an active area of 0.0092 mm².

【 授权许可】

Unknown