Rapid Processing of Wafer-Scale Anti-Reflecting 3D Hierarchical Structures on Silicon and Its Templation

Materials

Jaikrishna R.¹  HarsimranSingh Bindra¹  Ranu Nayak¹  Tushar Kumeria² 

[1] Amity Institute of Nanotechnology, Amity University Uttar Pradesh, Noida 201301, UP, India;School of Pharmacy, The University of Queensland, Brisbane, QLD 4102, Australia;

关键词: silicon;    hierarchical structure;    anti-reflection;    metal assisted chemical etching;    electroless deposition;   

DOI  :  10.3390/ma11122586

来源: DOAJ

【 摘 要 】

Hierarchically structured silicon (Si) surfaces with a combination of micro/nano-structures are highly explored for their unique surface and optical properties. In this context, we propose a rapid and facile electroless method to realize hierarchical structures on an entire Si wafer of 3″ diameter. The overall process takes only 65 s to complete, unlike any conventional wet chemical approach that often combines a wet anisotropic etching of (100) Si followed by a metal nanoparticle catalyst etching. Hierarchical surface texturing on Si demonstrates a broadband highly reduced reflectance with average R% ~ 2.7% within 300⁻1400 nm wavelength. The as-fabricated hierarchical structured Si was also templated on a thin transparent layer of Polydimethylsiloxane (PDMS) that further demonstrated prospects for improved solar encapsulation with high optical clarity and low reflectance (90% and 2.8%).

【 授权许可】

Unknown